This invention relates to integrated circuit and microelectromechanical systems (MEMS) devices. More particularly, this invention relates to the formation of patterned metal layers which may be used in the fabrication of the integrated circuits and MEMS devices.
Microelectromechanical systems are devices which are manufactured using lithographic fabrication processes originally developed for producing semiconductor electronic devices. Because the manufacturing processes are lithographic, MEMS devices may be made in very small sizes. MEMS techniques have been used to manufacture a wide variety of transducers and actuators, such as accelerometers and electrostatic cantilevers.
Magnetically sensitive structures employing effects such as anisotropic magneto resistance (AMR) and giant magnetoresistance (GMR) are well known in the field of magnetic recording, and may also be fabricated using MEMS and integrated circuit lithographic processes. These microfabricated devices provide a response to an applied magnetic field, for example, that arising from individual domains created in a magnetic recording medium. Because of their small size, the AMR and GMR sensors can resolve very small bit sizes and thus increase the density and storage capacity of the recording medium. However, to continually reduce the costs of the storage devices, ever higher information storage densities are being used. Accordingly, this requires ever smaller feature sizes in the magnetic transducers.
The very small feature sizes can be achieved using lithographic MEMS manufacturing techniques. These techniques often use a photosensitive material which is exposed through a mask with very fine features to create a pattern. The mask may have dimensional tolerances of under 1 micron. The patterned photoresist may then be used to create correspondingly small features in the metal or magnetic layers. However, as the feature sizes become ever smaller, the manufacturing process becomes sensitive to an increasing number of defects and failure modes.
For example, as feature sizes get smaller, material removal techniques are required that create relatively vertical sidewalls on the features in order to form a feature with sufficient precision or resolution. Ion milling is one such method for etching metal stacks in the MEMS/Semiconductor industry. Ion milling is a non-selective dry etch technique that is used in MEMS/semiconductor fabrication. The mill rate of various material is dependant on the angle of incidence and sputtering yield of the material. Ion milling is highly directional, forming nearly vertical sidewalls, and is usually done with photo resist as hard mask as described below.
FIG. 1A is a cross-sectional diagram of a prior art method for fabricating a structure 1 on a substrate 10. The method begins by milling fine features in a metal layer 20 on the substrate 10. In the prior art method, a photoresist mask 40 is deposited on the metal layer 20 and exposed through a pattern in a mask. After exposure the photoresist 40 is developed, leaving a void in the areas where the photoresist was not covered by the mask.
The milling process that patterns the metal layer 20 may take place through this void. For example, if ion milling is used to etch a feature in metal layer 20, the ions penetrate the void in the photoresist mask and impinge upon the metal surface of the layer 20, removing material in the metal layer 20. The bombardment of the metal film 20 may cause the metal material to be removed ballistically from the metal layer 20 because of the bombardment by the accelerated ions, and redeposited on surrounding surfaces.
FIG. 1B shows the condition of the substrate 10 and metal layer 20, upon completion of the milling step. After the milling step, a thin metal film 60 may be redeposited on the photoresist layer 40. These metal films 60, often referred to as “fences” or “bat ears” by those skilled in the art, may persist even after removal of the photoresist 40. The situation is shown in FIG. 1C.
The existence of the metal fences 60 on the substrate 10 and metal layer 20 may pose significant manufacturing problems. For example, the fences 60 may be smeared by subsequent polishing of the surface, which may provide an electrically conductive path between areas which should be insulating. This may cause substantial yield loss to the manufacturing concern.
Attempts to remove this fencing commonly involve using variable milling angle, mechanical scrubbing and using sonication with solvent chemistry. Even though the problem may be mitigated with these measures, it cannot be fully eliminated. These additional measures add cost and complexity to the process and may result in additional yield loss from the creation of scratches and debris. Also, these steps may be harsh, and thus ill-advised for delicate devices where mechanical scrubbing can lead to mechanical damage to the device as well. Hence, the prior solution causes yield loss, reliability issues and higher costs.
Accordingly, a method is needed which avoids the formation of these structures on the substrate altogether.